Minimum qualifications:
Bachelor's degree in Electrical engineering, Computer Science, or a related field.
5 years of experience with RTL design of Sub-System and or IP Development and integration into SoC.
Experience in synthesis, LEC, CDC, Low power design, and other FE tools and flows.
Preferred qualifications:
Master's degree in Electrical Engineering.
Knowledge of high performance and low-power design techniques.
Knowledge of ASIC Verification, design for testing (DFT), or Physical Design.
Knowledge of Hardware Security.
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves.
Your team designs and builds the hardware, software and networking technologies that power all of Google's services.
As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure.
You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing.
Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
In this role, you will work on design and RTL development of Security features and Sub-Systems and their integration into SOC/Chassis.
This includes the design, development, quality checks, tools and flows for successful integration into SOC.
Google's mission is to organize the world's information and make it universally accessible and useful.
Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences.
We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful.
We aim to make people's lives better through technology.
The US base salary range for this full-time position is $124,000-$182,000 + bonus + equity + benefits.
Our salary ranges are determined by role, level, and location.
The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position across all US locations.
Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training.
Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
Learn more about benefits at Google.
Responsibilities
Develop Hardware Security Features for SOC and Security Sub-systems/IPs and deploy Integration tools, flows and quality checks.
Work with cross-functional teams such as SOC integration, DFT and Physical design to ensure the successful integration of the security Sub-Systems and IPs in a complex SOC.
Deliver designs meeting power performance area goals with production quality.
Work closely with the functional verification team to ensure production quality design goals and coverage metrics are met.
Develop and maintain documentation for Security Design features, IP’s and Sub-Systems.
Google is proud to be an equal opportunity workplace and is an affirmative action employer.
We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status.
We also consider qualified applicants regardless of criminal histories, consistent with legal requirements.
See also Google's EEO Policy and EEO is the Law.
If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
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